1. Field
The present disclosure relates to a semiconductor light-emitting device.
2. Description of the Related Art
FIG. 20 is a schematic cross-sectional view of a GaAs infrared light-emitting device disclosed in Japanese Patent No. 3312049. The GaAs infrared light-emitting device illustrated in FIG. 20 includes a p-type semiconductor layer 111, an n-type semiconductor layer 112, a p-electrode 115 disposed on the p-type semiconductor layer 111, and separated n-electrodes 116 disposed on the n-type semiconductor layer 112. The p-type semiconductor layer 111 and the n-type semiconductor layer 112 have a PN junction plane 113 therebetween. The n-type semiconductor layer 112 has a V-shaped groove 117, which divides the PN junction plane 113. The surface of the n-type semiconductor layer 112 not covered with the n-electrodes 116 is substantially entirely covered with a reflective film 114. The reflective film 114 is a dielectric optical multilayer film.
In the GaAs infrared light-emitting device illustrated in FIG. 20, the V-shaped groove 117, which divides the PN junction plane 113, faces the p-electrode 115 disposed on the light emitting surface. Thus, the V-shaped groove 117 reduces the area of the PN junction plane 113 facing the p-electrode 115. It is therefore argued that the V-shaped groove 117 can reduce the amount of light traveling from the PN junction plane 113 to the p-electrode 115 and thereby reduce the amount of light blocked by the p-electrode 115 and improve light emission efficiency.
FIG. 21 is a schematic cross-sectional view of a micro LED array disclosed in Japanese Patent No. 4830356. The micro LED array illustrated in FIG. 21 includes a transparent electrode 121 containing indium tin oxide (ITO), an n-electrode 122 embedded in part of the transparent electrode 121, an n-type GaAs layer 123 disposed on the transparent electrode 121 and the n-electrode 122, an n-type AlGaInP layer 124 disposed on the n-type GaAs layer 123, a multiple quantum well (MQW) active layer 125 disposed on the n-type AlGaInP layer 124, the MQW active layer 125 including an AlGaInP layer and a GaInP layer alternately stacked on top of one another, a p-type semiconductor layer 126 including a p-type AlGaInP layer and a p-type GaInP layer, the p-type semiconductor layer 126 having a textured structure including a pair of inclined reflective (111) and (11-1) planes, a low-refractive-index film 127 filling part of the textured structure of the p-type semiconductor layer 126, a p-type GaAs layer 128 disposed on the p-type semiconductor layer 126, a p-electrode 129 covering the textured structure of the p-type semiconductor layer 126 and the p-type GaAs layer 128, a light reflecting metal layer 130 disposed on the p-type semiconductor layer 126 and covering the p-electrode 129, a lead electrode 132 disposed on and electrically connected to the light reflecting metal layer 130, a mold resin layer 131, and a concave mirror 133 having a large radius of curvature.
Each of the p-type AlGaInP layer and the p-type GaInP layer of the p-type semiconductor layer 126 contains phosphorus. Thus, the inclined reflective surfaces of the p-type semiconductor layer 126 are formed by wet etching using hydrochloric acid as an etchant utilizing different etch rates of different crystal faces. The pair of inclined reflective surfaces of the p-type semiconductor layer 126 form a V-shaped groove, which does not reach the MQW active layer 125.
In the micro LED array illustrated in FIG. 21, it is argued that the pair of inclined reflective surfaces of the p-type semiconductor layer 126 can confine the electric current between these inclined reflective surfaces and allows the electric current to flow into a limited region of the MQW active layer 125 rather than a nonradiative recombination region, such as an end surface of the device, thus improving luminous efficiency.
In the GaAs infrared light-emitting device illustrated in FIG. 20 and described in Japanese Patent No. 3312049, however, the V-shaped groove 117, which divides the PN junction plane 113, reduces the area of the PN junction plane 113 that is involved in light emission and thereby reduces light extraction efficiency. When the device structure illustrated in FIG. 20 is applied to a semiconductor light-emitting device containing AlxGayN (0<x≦1, 0≦y<1), in order to sufficiently activate the p-type semiconductor layer 111, the p-type semiconductor layer 111 can contain p-type GaN or p-type AlGaN having a low Al content. However, such a p-type semiconductor layer 111 greatly absorbs light emitted from the PN junction plane 113 and reduces light extraction efficiency.
When the device structure illustrated in FIG. 21 and described in Japanese Patent No. 4830356 is applied to a semiconductor light-emitting device containing AlxGayN (0<x≦1, 0≦y<1), in order to sufficiently activate the p-type semiconductor layer 126, the p-type semiconductor layer 126 can contain p-type GaN or p-type AlGaN having a low Al content. However, p-type GaN and p-type AlGaN having a low Al content are resistant to wet etching, making it difficult to form the inclined reflective surfaces. When the transparent electrode 121, for example, containing ITO is applied to a semiconductor light-emitting device containing AlxGayN (0<x≦1, 0≦y<1), the transparent electrode 121 has a great optical absorption loss and reduces light extraction efficiency.